The present invention generally relates to semiconductors, and more specifically, to using electrical measures to verify the planarization performance of a semiconductor device.
Field effect transistors (FETs) have been known for a number of years and are now the transistor of choice for use in complex integrated digital circuits. In general, field effect transistors can be fabricated somewhat more simply and with larger process windows than bipolar transistors and, additionally, allow simplified circuit and device design. Constraints on transistor footprint size and current-carrying capacity are continually increasing to satisfy demands for higher digital switching performance, increased functionality and economy of manufacture.